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authorAlistair Francis2019-04-20 04:24:18 +0200
committerPalmer Dabbelt2019-05-24 21:09:23 +0200
commitd64db71cf7d9075beac140086d7b4afbe3fb7557 (patch)
treec250ac195447c944598536157d58e689fc045655 /python/qemu
parenttarget/riscv: Add a base 32 and 64 bit CPU (diff)
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target/riscv: Deprecate the generic no MMU CPUs
These can now be specified via the command line so we no longer need these. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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