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authorMark Cave-Ayland2022-05-25 19:32:27 +0200
committerMichael S. Tsirkin2022-06-10 01:32:49 +0200
commit6164a1110448d4e2e13963b69093950acdd2348c (patch)
treea791ee2ce0bde71354f19a5f125b756e55104716 /python
parenthw/cxl: Fix missing write mask for HDM decoder target list registers (diff)
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hw/acpi/viot: rename build_pci_range_node() to enumerate_pci_host_bridges()
This is in preparation for separating out the VIOT ACPI table build from the PCI host bridge numeration. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220525173232.31429-2-mark.cave-ayland@ilande.co.uk> Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'python')
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