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author | Philippe Mathieu-Daudé | 2021-02-14 18:58:36 +0100 |
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committer | Philippe Mathieu-Daudé | 2021-02-21 19:42:34 +0100 |
commit | 61f4e0ec0dcedd2ade310aeb536ae750a0f7eef4 (patch) | |
tree | dc66416876235aee3f5d4767b5bf80b44f4a5950 /qemu-io-cmds.c | |
parent | target/mips: Rename 128-bit upper halve GPR registers (diff) | |
download | qemu-61f4e0ec0dcedd2ade310aeb536ae750a0f7eef4.tar.gz qemu-61f4e0ec0dcedd2ade310aeb536ae750a0f7eef4.tar.xz qemu-61f4e0ec0dcedd2ade310aeb536ae750a0f7eef4.zip |
target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210214175912.732946-7-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'qemu-io-cmds.c')
0 files changed, 0 insertions, 0 deletions