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| author | David Hildenbrand | 2019-03-07 13:15:09 +0100 |
|---|---|---|
| committer | Cornelia Huck | 2019-03-11 09:31:01 +0100 |
| commit | b971a2fda3c87adf4d57d81cf5e24fba59e36924 (patch) | |
| tree | 54fef45710d1e43fdf049156a603a028c4252860 /qom | |
| parent | s390x/tcg: Define vector instruction formats (diff) | |
| download | qemu-b971a2fda3c87adf4d57d81cf5e24fba59e36924.tar.gz qemu-b971a2fda3c87adf4d57d81cf5e24fba59e36924.tar.xz qemu-b971a2fda3c87adf4d57d81cf5e24fba59e36924.zip | |
s390x/tcg: Check vector register instructions at central point
Check them at a central point. We'll use a new instruction flag to
flag all vector instructions (IF_VEC) and handle it very similar to
AFP, whereby we use another unused position in the PSW mask to store
the state of vector register enablement per translation block.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20190307121539.12842-3-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Diffstat (limited to 'qom')
0 files changed, 0 insertions, 0 deletions