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authorMax Filippov2020-06-30 23:52:25 +0200
committerMax Filippov2020-08-21 21:48:15 +0200
commite95ef43181b49a401d163729d0d96f304525dfe7 (patch)
tree17b1eec6333d72b90f255cc3f2ba9c4b86349421 /replication.c
parenttests/tcg/xtensa: fix test execution on ISS (diff)
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tests/tcg/xtensa: update test_fp0_arith for DFPU
DFPU arithmetic opcodes update FSR flags. Add FSR parameters and expected FSR register values for the arithmetic tests. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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