diff options
| author | Peter Maydell | 2015-06-29 20:25:45 +0200 |
|---|---|---|
| committer | Peter Maydell | 2015-07-06 11:13:17 +0200 |
| commit | 12dc273e98e4e111880b25c12bf671dc8951b8e6 (patch) | |
| tree | 87ddbc336657790d4b56cc14476d205b7aca4dfc /scripts/checkpatch.pl | |
| parent | target-arm: Implement YIELD insn to yield in ARM and Thumb translators (diff) | |
| download | qemu-12dc273e98e4e111880b25c12bf671dc8951b8e6.tar.gz qemu-12dc273e98e4e111880b25c12bf671dc8951b8e6.tar.xz qemu-12dc273e98e4e111880b25c12bf671dc8951b8e6.zip | |
hw/intc/arm_gic_common.c: Reset all registers
The arm_gic_common reset function was missing reset code for
several of the GIC's state fields:
* bpr[]
* abpr[]
* priority1[]
* priority2[]
* sgi_pending[]
* irq_target[] (SMP configurations only)
These probably went unnoticed because most guests will either
never touch them, or will write to them in the process of
configuring the GIC before enabling interrupts.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1435602345-32210-1-git-send-email-peter.maydell@linaro.org
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'scripts/checkpatch.pl')
0 files changed, 0 insertions, 0 deletions