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| author | Tao Xu | 2019-10-11 09:41:03 +0200 |
|---|---|---|
| committer | Paolo Bonzini | 2019-10-23 17:50:27 +0200 |
| commit | 6508799707bbf018df82d354c388820217757f21 (patch) | |
| tree | 716cc4415ef040f4324ae5236100a6c5a04d870f /scripts/checkpatch.pl | |
| parent | x86/cpu: Add support for UMONITOR/UMWAIT/TPAUSE (diff) | |
| download | qemu-6508799707bbf018df82d354c388820217757f21.tar.gz qemu-6508799707bbf018df82d354c388820217757f21.tar.xz qemu-6508799707bbf018df82d354c388820217757f21.zip | |
target/i386: Add support for save/load IA32_UMWAIT_CONTROL MSR
UMWAIT and TPAUSE instructions use 32bits IA32_UMWAIT_CONTROL at MSR
index E1H to determines the maximum time in TSC-quanta that the processor
can reside in either C0.1 or C0.2.
This patch is to Add support for save/load IA32_UMWAIT_CONTROL MSR in
guest.
Co-developed-by: Jingqi Liu <jingqi.liu@intel.com>
Signed-off-by: Jingqi Liu <jingqi.liu@intel.com>
Signed-off-by: Tao Xu <tao3.xu@intel.com>
Message-Id: <20191011074103.30393-3-tao3.xu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'scripts/checkpatch.pl')
0 files changed, 0 insertions, 0 deletions