diff options
| author | Peter Maydell | 2021-06-17 14:16:24 +0200 |
|---|---|---|
| committer | Peter Maydell | 2021-06-24 15:58:48 +0200 |
| commit | 89bc4c4f78c2435fdf8dc10b650cfe73c75f1f2c (patch) | |
| tree | 228b697572633cd029d024ab705e7c3cae31ebde /scripts/checkpatch.pl | |
| parent | target/arm: Implement MVE VRHADD (diff) | |
| download | qemu-89bc4c4f78c2435fdf8dc10b650cfe73c75f1f2c.tar.gz qemu-89bc4c4f78c2435fdf8dc10b650cfe73c75f1f2c.tar.xz qemu-89bc4c4f78c2435fdf8dc10b650cfe73c75f1f2c.zip | |
target/arm: Implement MVE VADC, VSBC
Implement the MVE VADC and VSBC insns. These perform an
add-with-carry or subtract-with-carry of the 32-bit elements in each
lane of the input vectors, where the carry-out of each add is the
carry-in of the next. The initial carry input is either 1 or is from
FPSCR.C; the carry out at the end is written back to FPSCR.C.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210617121628.20116-41-peter.maydell@linaro.org
Diffstat (limited to 'scripts/checkpatch.pl')
0 files changed, 0 insertions, 0 deletions