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| author | Peter Maydell | 2019-09-05 10:33:01 +0200 |
|---|---|---|
| committer | Peter Maydell | 2019-09-05 10:33:01 +0200 |
| commit | 500efcfcf0fe2e0dae1d25637a13435ce7b6e421 (patch) | |
| tree | 3a79d3ae876bc02eea9bd1dbb4e4029fbd4b10d8 /scripts/git-submodule.sh | |
| parent | Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging (diff) | |
| parent | target/openrisc: Update cpu "any" to v1.3 (diff) | |
| download | qemu-500efcfcf0fe2e0dae1d25637a13435ce7b6e421.tar.gz qemu-500efcfcf0fe2e0dae1d25637a13435ce7b6e421.tar.xz qemu-500efcfcf0fe2e0dae1d25637a13435ce7b6e421.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-or1k-20190904' into staging
Updates for arch v1.3.
# gpg: Signature made Wed 04 Sep 2019 21:30:41 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-or1k-20190904:
target/openrisc: Update cpu "any" to v1.3
target/openrisc: Implement l.adrp
target/openrisc: Implement move to/from FPCSR
target/openrisc: Implement unordered fp comparisons
target/openrisc: Add support for ORFPX64A32
target/openrisc: Check CPUCFG_OF32S for float insns
target/openrisc: Fix lf.ftoi.s
target/openrisc: Add VR2 and AVR special processor registers
target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu init
target/openrisc: Make VR and PPC read-only
target/openrisc: Cache R0 in DisasContext
target/openrisc: Replace cpu register array with a function
target/openrisc: Add DisasContext parameter to check_r0_write
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts/git-submodule.sh')
0 files changed, 0 insertions, 0 deletions