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| author | Anup Patel | 2018-12-13 19:34:52 +0100 |
|---|---|---|
| committer | Palmer Dabbelt | 2018-12-20 21:03:12 +0100 |
| commit | fe93582cf52ee67f6ab5a59051d354344010cfdc (patch) | |
| tree | 66f3c96a1164eb8ac47bfc9314904d79440924dd /scripts/git-submodule.sh | |
| parent | riscv: Enable VGA and PCIE_VGA (diff) | |
| download | qemu-fe93582cf52ee67f6ab5a59051d354344010cfdc.tar.gz qemu-fe93582cf52ee67f6ab5a59051d354344010cfdc.tar.xz qemu-fe93582cf52ee67f6ab5a59051d354344010cfdc.zip | |
sifive_u: Add clock DT node for GEM ethernet
The GEM ethernet on SiFive unleashed has fixed input clock
of 125MHz as-per SiFive FU540 manual. This patch updates FDT
generation for QEMU sifive_u machine to provide fixed-rate
clock for GEM ethernet.
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'scripts/git-submodule.sh')
0 files changed, 0 insertions, 0 deletions