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| author | Mark Cave-Ayland | 2018-06-13 10:30:13 +0200 |
|---|---|---|
| committer | David Gibson | 2018-06-16 08:32:33 +0200 |
| commit | 7f5d6517e303e39d79f57ca92919725e03c9fad8 (patch) | |
| tree | e8c6b481f87c7a94e3aff2333112b53f1ca4a1c5 /scripts/modules | |
| parent | xics_kvm: fix a build break (diff) | |
| download | qemu-7f5d6517e303e39d79f57ca92919725e03c9fad8.tar.gz qemu-7f5d6517e303e39d79f57ca92919725e03c9fad8.tar.xz qemu-7f5d6517e303e39d79f57ca92919725e03c9fad8.zip | |
mos6522: only clear the shift register interrupt upon write
According to the 6522 datasheet the shift register (SR) interrupt flag is
cleared upon write with no mention of any other interrupt flags.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'scripts/modules')
0 files changed, 0 insertions, 0 deletions