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| author | Stafford Horne | 2017-06-17 18:50:06 +0200 |
|---|---|---|
| committer | Stafford Horne | 2017-10-20 23:35:47 +0200 |
| commit | 8c949951ed257567303c3d3b83bcd876b53d79e5 (patch) | |
| tree | 39a29ce409d4c834b13d0f65afaee8694e283c49 /scripts/modules | |
| parent | openrisc/ompic: Add OpenRISC Multicore PIC (OMPIC) (diff) | |
| download | qemu-8c949951ed257567303c3d3b83bcd876b53d79e5.tar.gz qemu-8c949951ed257567303c3d3b83bcd876b53d79e5.tar.xz qemu-8c949951ed257567303c3d3b83bcd876b53d79e5.zip | |
target/openrisc: Make coreid and numcores variable
Previously coreid and numcores were hard coded as 0 and 1 respectively
as OpenRISC QEMU did not have multicore support.
Multicore support is now being added so these registers need to have
configured values.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'scripts/modules')
0 files changed, 0 insertions, 0 deletions