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| author | Cédric Le Goater | 2017-01-20 12:15:08 +0100 |
|---|---|---|
| committer | Peter Maydell | 2017-01-20 12:15:08 +0100 |
| commit | fcdf2c59456fb6d0fdc656cf395b2aa15888b46c (patch) | |
| tree | 9bbcefaa2fb303618cb71646a38fa7a34f07d049 /scripts/simpletrace.py | |
| parent | aspeed/smc: adjust the size of the register region (diff) | |
| download | qemu-fcdf2c59456fb6d0fdc656cf395b2aa15888b46c.tar.gz qemu-fcdf2c59456fb6d0fdc656cf395b2aa15888b46c.tar.xz qemu-fcdf2c59456fb6d0fdc656cf395b2aa15888b46c.zip | |
aspeed/smc: handle SPI flash Command mode
The Aspeed SMC controllers have a mode (Command mode) in which
accesses to the flash content are no different than doing MMIOs. The
controller generates all the necessary commands to load (or store)
data in memory.
However, accesses are restricted to the segment window assigned the
the flash module by the controller. This window is defined by the
Segment Address Register.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 1483979087-32663-8-git-send-email-clg@kaod.org
[PMM: Deleted now-unused aspeed_smc_is_usermode() function]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts/simpletrace.py')
0 files changed, 0 insertions, 0 deletions