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| author | Alex Bennée | 2018-03-01 12:05:54 +0100 |
|---|---|---|
| committer | Peter Maydell | 2018-03-01 12:13:59 +0100 |
| commit | 15f8a233c8c023dbc77b6fe6cd7c79eac9bee263 (patch) | |
| tree | c3f875320580048818c2a3263a8c1f8d500dc861 /scripts/switch-timer-api | |
| parent | arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16 (diff) | |
| download | qemu-15f8a233c8c023dbc77b6fe6cd7c79eac9bee263.tar.gz qemu-15f8a233c8c023dbc77b6fe6cd7c79eac9bee263.tar.xz qemu-15f8a233c8c023dbc77b6fe6cd7c79eac9bee263.zip | |
arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16
Neither of these operations alter the floating point status registers
so we can do a pure bitwise operation, either squashing any sign
bit (ABS) or inverting it (NEG).
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180227143852.11175-22-alex.bennee@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts/switch-timer-api')
0 files changed, 0 insertions, 0 deletions