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| author | Singh, Brijesh | 2018-10-01 21:44:32 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin | 2018-11-05 19:24:02 +0100 |
| commit | 470506b5821c62d6b00d0dd82eea999b61c3719e (patch) | |
| tree | 9de12275d5b84b7dd57b8c48883b1d049f621954 /scripts/switch-timer-api | |
| parent | x86_iommu: move vtd_generate_msi_message in common file (diff) | |
| download | qemu-470506b5821c62d6b00d0dd82eea999b61c3719e.tar.gz qemu-470506b5821c62d6b00d0dd82eea999b61c3719e.tar.xz qemu-470506b5821c62d6b00d0dd82eea999b61c3719e.zip | |
x86_iommu/amd: remove V=1 check from amdvi_validate_dte()
Currently, the amdvi_validate_dte() assumes that a valid DTE will
always have V=1. This is not true. The V=1 means that bit[127:1] are
valid. A valid DTE can have IV=1 and V=0 (i.e address translation
disabled and interrupt remapping enabled)
Remove the V=1 check from amdvi_validate_dte(), make the caller
responsible to check for V or IV bits.
This also fixes a bug in existing code that when error is
detected during the translation we'll fail the translation
instead of assuming a passthrough mode.
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Cc: Tom Lendacky <Thomas.Lendacky@amd.com>
Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'scripts/switch-timer-api')
0 files changed, 0 insertions, 0 deletions