diff options
| author | Alex Bennée | 2017-02-23 19:29:26 +0100 |
|---|---|---|
| committer | Alex Bennée | 2017-02-24 11:32:46 +0100 |
| commit | 4881658a4bf6dc5335e5033d0916b2e86687463d (patch) | |
| tree | 3249469a4df1c5be773ff86236f46679504ba528 /scripts/switch-timer-api | |
| parent | target-arm: ensure all cross vCPUs TLB flushes complete (diff) | |
| download | qemu-4881658a4bf6dc5335e5033d0916b2e86687463d.tar.gz qemu-4881658a4bf6dc5335e5033d0916b2e86687463d.tar.xz qemu-4881658a4bf6dc5335e5033d0916b2e86687463d.zip | |
hw/misc/imx6_src: defer clearing of SRC_SCR reset bits
The arm_reset_cpu/set_cpu_on/set_cpu_off() functions do their work
asynchronously in the target vCPUs context. As a result we need to
ensure the SRC_SCR reset bits correctly report the reset status at the
right time. To do this we defer the clearing of the bit with an async
job which will run after the work queued by ARM powerctl functions.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts/switch-timer-api')
0 files changed, 0 insertions, 0 deletions