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| author | Stefan Markovic | 2018-10-03 14:25:32 +0200 |
|---|---|---|
| committer | Aleksandar Markovic | 2018-10-18 20:37:20 +0200 |
| commit | 59e781fbf13a2dede15437d055b09d7ea120dcac (patch) | |
| tree | 7ab16da6b2b922e8eaa2fa50ec1fc2179b05af3a /scripts/switch-timer-api | |
| parent | target/mips: Add bit definitions for DSP R3 ASE (diff) | |
| download | qemu-59e781fbf13a2dede15437d055b09d7ea120dcac.tar.gz qemu-59e781fbf13a2dede15437d055b09d7ea120dcac.tar.xz qemu-59e781fbf13a2dede15437d055b09d7ea120dcac.zip | |
target/mips: Add availability control for DSP R3 ASE
Add infrastructure for availability control for DSP R3 ASE MIPS
instructions. Only BPOSGE32C currently belongs to DSP R3 ASE, but
this is likely to be changed in near future.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Diffstat (limited to 'scripts/switch-timer-api')
0 files changed, 0 insertions, 0 deletions