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| author | Greg Bellows | 2014-12-11 13:07:52 +0100 |
|---|---|---|
| committer | Peter Maydell | 2014-12-11 13:07:52 +0100 |
| commit | be693c87e440e671ed913784554384349ce8331d (patch) | |
| tree | daa5882fa399d0b4cc74241f2cd30bf537bfd397 /scripts/switch-timer-api | |
| parent | target-arm: make c13 cp regs banked (FCSEIDR, ...) (diff) | |
| download | qemu-be693c87e440e671ed913784554384349ce8331d.tar.gz qemu-be693c87e440e671ed913784554384349ce8331d.tar.xz qemu-be693c87e440e671ed913784554384349ce8331d.zip | |
target-arm: make MAIR0/1 banked
Added CP register info entries for the ARMv7 MAIR0/1 secure banks.
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1416242878-876-26-git-send-email-greg.bellows@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts/switch-timer-api')
0 files changed, 0 insertions, 0 deletions