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author | Liu Jingqi | 2018-11-06 08:13:27 +0100 |
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committer | Eduardo Habkost | 2018-12-11 21:50:48 +0100 |
commit | 1c65775ffc2dbd276a8bffe592feba0e186a151c (patch) | |
tree | 6b4171e14721da43b4eb8d19f11963e0f6618c15 /scripts/tracetool/backend/log.py | |
parent | x86/cpu: Enable MOVDIRI cpu feature (diff) | |
download | qemu-1c65775ffc2dbd276a8bffe592feba0e186a151c.tar.gz qemu-1c65775ffc2dbd276a8bffe592feba0e186a151c.tar.xz qemu-1c65775ffc2dbd276a8bffe592feba0e186a151c.zip |
x86/cpu: Enable MOVDIR64B cpu feature
MOVDIR64B moves 64-bytes as direct-store with 64-bytes write atomicity.
Direct store is implemented by using write combining (WC) for writing
data directly into memory without caching the data.
The bit definition:
CPUID.(EAX=7,ECX=0):ECX[bit 28] MOVDIR64B
The release document ref below link:
https://software.intel.com/sites/default/files/managed/c5/15/\
architecture-instruction-set-extensions-programming-reference.pdf
Cc: Xu Tao <tao3.xu@intel.com>
Signed-off-by: Liu Jingqi <jingqi.liu@intel.com>
Message-Id: <1541488407-17045-3-git-send-email-jingqi.liu@intel.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'scripts/tracetool/backend/log.py')
0 files changed, 0 insertions, 0 deletions