diff options
| author | Konrad Rzeszutek Wilk | 2018-06-01 17:38:09 +0200 |
|---|---|---|
| committer | Eduardo Habkost | 2018-06-22 20:01:15 +0200 |
| commit | 254790a909a2f153d689bfa7d8e8f0386cda870d (patch) | |
| tree | dba51d064437242bd185fe98fb8b0b16bbc24bae /scripts | |
| parent | i386: define the AMD 'amd-ssbd' CPUID feature bit (diff) | |
| download | qemu-254790a909a2f153d689bfa7d8e8f0386cda870d.tar.gz qemu-254790a909a2f153d689bfa7d8e8f0386cda870d.tar.xz qemu-254790a909a2f153d689bfa7d8e8f0386cda870d.zip | |
i386: Define AMD's no SSB mitigation needed.
AMD future CPUs expose a mechanism to tell the guest that the
Speculative Store Bypass Disable is not needed and that the
CPU is all good.
This is exposed via the CPUID 8000_0008.EBX[26] bit.
See 124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf
A copy of this document is available at
https://bugzilla.kernel.org/show_bug.cgi?id=199889
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Message-Id: <20180601153809.15259-3-konrad.wilk@oracle.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions