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| author | Peter Maydell | 2017-07-20 12:00:10 +0200 |
|---|---|---|
| committer | Peter Maydell | 2017-07-20 12:00:10 +0200 |
| commit | 87a60ee84f8abfc26f200ceac86ef32a690b9e21 (patch) | |
| tree | 539fbda162c7ce53cbbd8c7754aee23485506ec3 /scripts | |
| parent | Replace 'struct ucontext' with 'ucontext_t' type (diff) | |
| parent | tcg: Pass generic CPUState to gen_intermediate_code() (diff) | |
| download | qemu-87a60ee84f8abfc26f200ceac86ef32a690b9e21.tar.gz qemu-87a60ee84f8abfc26f200ceac86ef32a690b9e21.tar.xz qemu-87a60ee84f8abfc26f200ceac86ef32a690b9e21.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170719' into staging
Queued tcg and tcg code gen related cleanups
# gpg: Signature made Thu 20 Jul 2017 00:32:00 BST
# gpg: using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg: aka "Richard Henderson <rth@redhat.com>"
# gpg: aka "Richard Henderson <rth@twiddle.net>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B
* remotes/rth/tags/pull-tcg-20170719:
tcg: Pass generic CPUState to gen_intermediate_code()
tcg/tci: enable bswap16_i64
target/alpha: optimize gen_cvtlq() using deposit op
target/sparc: optimize gen_op_mulscc() using deposit op
target/sparc: optimize various functions using extract op
target/ppc: optimize various functions using extract op
target/m68k: optimize bcd_flags() using extract op
target/arm: optimize aarch32 rev16
target/arm: Optimize aarch64 rev16
coccinelle: add a script to optimize tcg op using tcg_gen_extract()
coccinelle: ignore ASTs pre-parsed cached C files
tcg: Expand glue macros before stringifying helper names
util/cacheinfo: Add missing include for ppc linux
tcg/mips: reserve a register for the guest_base.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts')
| -rw-r--r-- | scripts/coccinelle/tcg_gen_extract.cocci | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/scripts/coccinelle/tcg_gen_extract.cocci b/scripts/coccinelle/tcg_gen_extract.cocci new file mode 100644 index 0000000000..81e66a35ae --- /dev/null +++ b/scripts/coccinelle/tcg_gen_extract.cocci @@ -0,0 +1,107 @@ +// optimize TCG using extract op +// +// Copyright: (C) 2017 Philippe Mathieu-Daudé. GPLv2+. +// Confidence: High +// Options: --macro-file scripts/cocci-macro-file.h +// +// Nikunj A Dadhania optimization: +// http://lists.nongnu.org/archive/html/qemu-devel/2017-02/msg05211.html +// Aurelien Jarno optimization: +// http://lists.nongnu.org/archive/html/qemu-devel/2017-05/msg01466.html +// +// This script can be run either using spatch locally or via a docker image: +// +// $ spatch \ +// --macro-file scripts/cocci-macro-file.h \ +// --sp-file scripts/coccinelle/tcg_gen_extract.cocci \ +// --keep-comments --in-place \ +// --use-gitgrep --dir target +// +// $ docker run --rm -v `pwd`:`pwd` -w `pwd` philmd/coccinelle \ +// --macro-file scripts/cocci-macro-file.h \ +// --sp-file scripts/coccinelle/tcg_gen_extract.cocci \ +// --keep-comments --in-place \ +// --use-gitgrep --dir target + +@initialize:python@ +@@ +import sys +fd = sys.stderr +def debug(msg="", trailer="\n"): + fd.write("[DBG] " + msg + trailer) +def low_bits_count(value): + bits_count = 0 + while (value & (1 << bits_count)): + bits_count += 1 + return bits_count +def Mn(order): # Mersenne number + return (1 << order) - 1 + +@match@ +identifier ret; +metavariable arg; +constant ofs, msk; +position shr_p, and_p; +@@ +( + tcg_gen_shri_i32@shr_p +| + tcg_gen_shri_i64@shr_p +| + tcg_gen_shri_tl@shr_p +)(ret, arg, ofs); +... WHEN != ret +( + tcg_gen_andi_i32@and_p +| + tcg_gen_andi_i64@and_p +| + tcg_gen_andi_tl@and_p +)(ret, ret, msk); + +@script:python verify_len depends on match@ +ret_s << match.ret; +msk_s << match.msk; +shr_p << match.shr_p; +extract_len; +@@ +is_optimizable = False +debug("candidate at %s:%s" % (shr_p[0].file, shr_p[0].line)) +try: # only eval integer, no #define like 'SR_M' (cpp did this, else some headers are missing). + msk_v = long(msk_s.strip("UL"), 0) + msk_b = low_bits_count(msk_v) + if msk_b == 0: + debug(" value: 0x%x low_bits: %d" % (msk_v, msk_b)) + else: + debug(" value: 0x%x low_bits: %d [Mersenne number: 0x%x]" % (msk_v, msk_b, Mn(msk_b))) + is_optimizable = Mn(msk_b) == msk_v # check low_bits + coccinelle.extract_len = "%d" % msk_b + debug(" candidate %s optimizable" % ("IS" if is_optimizable else "is NOT")) +except: + debug(" ERROR (check included headers?)") +cocci.include_match(is_optimizable) +debug() + +@replacement depends on verify_len@ +identifier match.ret; +metavariable match.arg; +constant match.ofs, match.msk; +position match.shr_p, match.and_p; +identifier verify_len.extract_len; +@@ +( +-tcg_gen_shri_i32@shr_p(ret, arg, ofs); ++tcg_gen_extract_i32(ret, arg, ofs, extract_len); +... WHEN != ret +-tcg_gen_andi_i32@and_p(ret, ret, msk); +| +-tcg_gen_shri_i64@shr_p(ret, arg, ofs); ++tcg_gen_extract_i64(ret, arg, ofs, extract_len); +... WHEN != ret +-tcg_gen_andi_i64@and_p(ret, ret, msk); +| +-tcg_gen_shri_tl@shr_p(ret, arg, ofs); ++tcg_gen_extract_tl(ret, arg, ofs, extract_len); +... WHEN != ret +-tcg_gen_andi_tl@and_p(ret, ret, msk); +) |
