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| author | Fabian Aggeler | 2014-06-09 16:43:22 +0200 |
|---|---|---|
| committer | Peter Maydell | 2014-06-09 16:43:22 +0200 |
| commit | 8d5c773e323b22402abdd0beef4c7d2fc91dd0eb (patch) | |
| tree | d4c034b9d737485a7361f1c3d3ed0c37c55aad8a /scripts | |
| parent | target-arm/cpu64.c: Actually register Cortex-A57 impdef registers (diff) | |
| download | qemu-8d5c773e323b22402abdd0beef4c7d2fc91dd0eb.tar.gz qemu-8d5c773e323b22402abdd0beef4c7d2fc91dd0eb.tar.xz qemu-8d5c773e323b22402abdd0beef4c7d2fc91dd0eb.zip | |
target-arm: Prepare cpreg writefns/readfns for EL3/SecExt
This patch changes some readfns/writefns to use raw_write
and raw_read functions, which use the fieldoffset specified
in ARMCPRegInfo instead of directly accessing the field.
This will simplify patches for EL3 & Security Extensions.
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Message-id: 1401962428-14749-1-git-send-email-aggelerf@ethz.ch
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions