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| author | Paolo Bonzini | 2022-09-18 00:27:12 +0200 |
|---|---|---|
| committer | Paolo Bonzini | 2022-09-18 09:17:40 +0200 |
| commit | 958e1dd1300f37f18b2161dfb4eb806fc8c19b44 (patch) | |
| tree | f04a5eb24e64622d19aaf2f4e6cfdfa4b897fd47 /scripts | |
| parent | KVM: use store-release to mark dirty pages as harvested (diff) | |
| download | qemu-958e1dd1300f37f18b2161dfb4eb806fc8c19b44.tar.gz qemu-958e1dd1300f37f18b2161dfb4eb806fc8c19b44.tar.xz qemu-958e1dd1300f37f18b2161dfb4eb806fc8c19b44.zip | |
target/i386: Raise #GP on unaligned m128 accesses when required.
Many instructions which load/store 128-bit values are supposed to
raise #GP when the memory operand isn't 16-byte aligned. This includes:
- Instructions explicitly requiring memory alignment (Exceptions Type 1
in the "AVX and SSE Instruction Exception Specification" section of
the SDM)
- Legacy SSE instructions that load/store 128-bit values (Exceptions
Types 2 and 4).
This change sets MO_ALIGN_16 on 128-bit memory accesses that require
16-byte alignment. It adds cpu_record_sigbus and cpu_do_unaligned_access
hooks that simulate a #GP exception in qemu-user and qemu-system,
respectively.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/217
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ricky Zhou <ricky@rzhou.org>
Message-Id: <20220830034816.57091-2-ricky@rzhou.org>
[Do not bother checking PREFIX_VEX, since AVX is not supported. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions