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authorAlistair Francis2020-12-16 19:22:54 +0100
committerAlistair Francis2020-12-18 06:56:44 +0100
commit114baaca513d866763ef306a65fcbba1b0c0161f (patch)
treec9137779805d4d410355674d1b7211bf729dcaf8 /scsi
parenttarget/riscv: Add a riscv_cpu_is_32bit() helper function (diff)
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target/riscv: Specify the XLEN for CPUs
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: c1da66affbb83ec4a2fbeb0194293bd24d65f5dc.1608142916.git.alistair.francis@wdc.com
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