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| author | aurel32 | 2008-09-18 15:45:14 +0200 |
|---|---|---|
| committer | aurel32 | 2008-09-18 15:45:14 +0200 |
| commit | 04acd3072622097f343d16e2da2ec84d6ee1b840 (patch) | |
| tree | a0bf148385f592bf64dbe864994c31647a5feff2 /target-alpha/cpu.h | |
| parent | Use TCG registers for most CPU register accesses. (diff) | |
| download | qemu-04acd3072622097f343d16e2da2ec84d6ee1b840.tar.gz qemu-04acd3072622097f343d16e2da2ec84d6ee1b840.tar.xz qemu-04acd3072622097f343d16e2da2ec84d6ee1b840.zip | |
target-alpha: convert remaining arith3 functions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5254 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-alpha/cpu.h')
| -rw-r--r-- | target-alpha/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index 4e98c3b98e..a3458a4146 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -275,7 +275,7 @@ struct CPUAlphaState { /* temporary fixed-point registers * used to emulate 64 bits target on 32 bits hosts */ - target_ulong t0, t1, t2; + target_ulong t0, t1; #endif /* */ double ft0, ft1, ft2; |