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| author | aurel32 | 2008-09-18 15:45:14 +0200 |
|---|---|---|
| committer | aurel32 | 2008-09-18 15:45:14 +0200 |
| commit | 04acd3072622097f343d16e2da2ec84d6ee1b840 (patch) | |
| tree | a0bf148385f592bf64dbe864994c31647a5feff2 /target-alpha/exec.h | |
| parent | Use TCG registers for most CPU register accesses. (diff) | |
| download | qemu-04acd3072622097f343d16e2da2ec84d6ee1b840.tar.gz qemu-04acd3072622097f343d16e2da2ec84d6ee1b840.tar.xz qemu-04acd3072622097f343d16e2da2ec84d6ee1b840.zip | |
target-alpha: convert remaining arith3 functions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5254 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-alpha/exec.h')
| -rw-r--r-- | target-alpha/exec.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target-alpha/exec.h b/target-alpha/exec.h index ec2f8efefb..574ef13f10 100644 --- a/target-alpha/exec.h +++ b/target-alpha/exec.h @@ -34,13 +34,11 @@ register struct CPUAlphaState *env asm(AREG0); /* no registers can be used */ #define T0 (env->t0) #define T1 (env->t1) -#define T2 (env->t2) #else register uint64_t T0 asm(AREG1); register uint64_t T1 asm(AREG2); -register uint64_t T2 asm(AREG3); #endif /* TARGET_LONG_BITS > HOST_LONG_BITS */ |