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| author | Richard Henderson | 2010-03-29 19:48:14 +0200 |
|---|---|---|
| committer | Aurelien Jarno | 2010-04-27 05:50:41 +0200 |
| commit | 49563a727494197ad87936bfd07841878878b650 (patch) | |
| tree | f628a1cc0f9b3ce6ef3611120c435aa377cd53d8 /target-alpha | |
| parent | target-alpha: Emit goto_tb opcodes. (diff) | |
| download | qemu-49563a727494197ad87936bfd07841878878b650.tar.gz qemu-49563a727494197ad87936bfd07841878878b650.tar.xz qemu-49563a727494197ad87936bfd07841878878b650.zip | |
target-alpha: Update commentary for opcode 0x1A.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-alpha')
| -rw-r--r-- | target-alpha/translate.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 2a9cee9c6b..4321a25eeb 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -2531,13 +2531,16 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn) break; #endif case 0x1A: - if (rb != 31) + /* JMP, JSR, RET, JSR_COROUTINE. These only differ by the branch + prediction stack action, which of course we don't implement. */ + if (rb != 31) { tcg_gen_andi_i64(cpu_pc, cpu_ir[rb], ~3); - else + } else { tcg_gen_movi_i64(cpu_pc, 0); - if (ra != 31) + } + if (ra != 31) { tcg_gen_movi_i64(cpu_ir[ra], ctx->pc); - /* Those four jumps only differ by the branch prediction hint */ + } ret = EXIT_PC_UPDATED; break; case 0x1B: |