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| author | Richard Henderson | 2014-03-21 20:46:59 +0100 |
|---|---|---|
| committer | Richard Henderson | 2014-04-17 20:47:41 +0200 |
| commit | cd2d46fd21783c9658c9ba0d753f5d589b67582a (patch) | |
| tree | 686744e9a1fb456bc3ac66f68b32bcc9e0ad8507 /target-alpha | |
| parent | target-alpha: Convert gen_load/store_mem to source/sink (diff) | |
| download | qemu-cd2d46fd21783c9658c9ba0d753f5d589b67582a.tar.gz qemu-cd2d46fd21783c9658c9ba0d753f5d589b67582a.tar.xz qemu-cd2d46fd21783c9658c9ba0d753f5d589b67582a.zip | |
target-alpha: Convert gen_store_conditional to source/sink
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-alpha')
| -rw-r--r-- | target-alpha/translate.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c index a72f10f436..289a703c9d 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -376,11 +376,7 @@ static ExitStatus gen_store_conditional(DisasContext *ctx, int ra, int rb, addr = tcg_temp_local_new(); #endif - if (rb != 31) { - tcg_gen_addi_i64(addr, cpu_ir[rb], disp16); - } else { - tcg_gen_movi_i64(addr, disp16); - } + tcg_gen_addi_i64(addr, load_gpr(ctx, rb), disp16); #if defined(CONFIG_USER_ONLY) /* ??? This is handled via a complicated version of compare-and-swap |