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author | Aurelio C. Remonda | 2015-06-15 19:06:09 +0200 |
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committer | Peter Maydell | 2015-06-15 19:06:09 +0200 |
commit | 62b44f059a84d1ac580a653fc4110dfabaef6b83 (patch) | |
tree | 1e626439b0f46595fedee0643a4b6351374845cf /target-arm/cpu.h | |
parent | hw/sd/pxa2xx_mmci: Stop using old_mmio in MemoryRegionOps (diff) | |
download | qemu-62b44f059a84d1ac580a653fc4110dfabaef6b83.tar.gz qemu-62b44f059a84d1ac580a653fc4110dfabaef6b83.tar.xz qemu-62b44f059a84d1ac580a653fc4110dfabaef6b83.zip |
target-arm: Add the THUMB_DSP feature
Create an ARM_FEATURE_THUMB_DSP controlling the Thumb encodings of
the 85 DSP instructions (these are all Thumb2). This is enabled for
all non-M-profile CPUs with Thumb2 support, as the instructions are
mandatory for R and A profiles. On M profile they are optional and
not present in the Cortex-M3 (though they are in the M4).
The effect of this commit is that we will now treat the DSP
encodings as illegal instructions on M3, when previously we
incorrectly implemented them.
Signed-off-by: Aurelio C. Remonda <aurelioremonda@gmail.com>
Message-id: 1434311355-26554-1-git-send-email-aurelioremonda@gmail.com
[PMM: added clz/crc32/crc32c and default case to the early-decode switch;
minor format/spacing fixups; reworded commit message a bit]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r-- | target-arm/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 7c1d95c815..c9d2330014 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -889,6 +889,7 @@ enum arm_features { ARM_FEATURE_V8_SHA1, /* implements SHA1 part of v8 Crypto Extensions */ ARM_FEATURE_V8_SHA256, /* implements SHA256 part of v8 Crypto Extensions */ ARM_FEATURE_V8_PMULL, /* implements PMULL part of v8 Crypto Extensions */ + ARM_FEATURE_THUMB_DSP, /* DSP insns supported in the Thumb encodings */ }; static inline int arm_feature(CPUARMState *env, int feature) |