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| author | Peter Crosthwaite | 2015-06-19 15:17:45 +0200 |
|---|---|---|
| committer | Peter Maydell | 2015-06-19 15:17:45 +0200 |
| commit | f6bda88ff839e2adefe4959b7def420b90703855 (patch) | |
| tree | 4543b136d8c0fc2180b226bbc6f0d854a6652010 /target-arm/cpu.h | |
| parent | target-arm: Add registers for PMSAv7 (diff) | |
| download | qemu-f6bda88ff839e2adefe4959b7def420b90703855.tar.gz qemu-f6bda88ff839e2adefe4959b7def420b90703855.tar.xz qemu-f6bda88ff839e2adefe4959b7def420b90703855.zip | |
target-arm: Implement PMSAv7 MPU
Unified MPU only. Uses ARM architecture major revision to switch
between PMSAv5 and v7 when ARM_FEATURE_MPU is set. PMSA v6 remains
unsupported and is asserted against.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: dcb03cda6dd754c5cc6a962fa11f25089811e954.1434501320.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 0c320ea2da..80297b342e 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -560,6 +560,7 @@ void pmccntr_sync(CPUARMState *env); #define SCTLR_DT (1U << 16) /* up to ??, RAO in v6 and v7 */ #define SCTLR_nTWI (1U << 16) /* v8 onward */ #define SCTLR_HA (1U << 17) +#define SCTLR_BR (1U << 17) /* PMSA only */ #define SCTLR_IT (1U << 18) /* up to ??, RAO in v6 and v7 */ #define SCTLR_nTWE (1U << 18) /* v8 onward */ #define SCTLR_WXN (1U << 19) |