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| author | Edgar E. Iglesias | 2014-05-01 16:24:45 +0200 |
|---|---|---|
| committer | Peter Maydell | 2014-05-01 16:24:45 +0200 |
| commit | 1b505f93bcf605e7c4144fef83bd039b0d4f2576 (patch) | |
| tree | 1709df9a87388bf3e1a12ed507eca93e282ab9e8 /target-arm | |
| parent | target-arm: Make vbar_write 64bit friendly on 32bit hosts (diff) | |
| download | qemu-1b505f93bcf605e7c4144fef83bd039b0d4f2576.tar.gz qemu-1b505f93bcf605e7c4144fef83bd039b0d4f2576.tar.xz qemu-1b505f93bcf605e7c4144fef83bd039b0d4f2576.zip | |
target-arm: A64: Handle blr lr
For linked branches, updates to the link register happen
conceptually after the read of the branch target register.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Cc: qemu-stable@nongnu.org
Message-id: 1398926097-28097-3-git-send-email-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/translate-a64.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index e31e069041..b62db4d566 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -1509,8 +1509,10 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) switch (opc) { case 0: /* BR */ case 2: /* RET */ + tcg_gen_mov_i64(cpu_pc, cpu_reg(s, rn)); break; case 1: /* BLR */ + tcg_gen_mov_i64(cpu_pc, cpu_reg(s, rn)); tcg_gen_movi_i64(cpu_reg(s, 30), s->pc); break; case 4: /* ERET */ @@ -1529,7 +1531,6 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) return; } - tcg_gen_mov_i64(cpu_pc, cpu_reg(s, rn)); s->is_jmp = DISAS_JUMP; } |