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author | bellard | 2005-12-18 17:54:08 +0100 |
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committer | bellard | 2005-12-18 17:54:08 +0100 |
commit | 6d7e63262c7e47400c37cb6b789b1e2df8d492e4 (patch) | |
tree | 9d6cbff0eade3524595cd82c2108ddc20873a4da /target-arm | |
parent | '-net socket,mcast=' option support (initial patch by Juan Jose Ciarlante) (diff) | |
download | qemu-6d7e63262c7e47400c37cb6b789b1e2df8d492e4.tar.gz qemu-6d7e63262c7e47400c37cb6b789b1e2df8d492e4.tar.xz qemu-6d7e63262c7e47400c37cb6b789b1e2df8d492e4.zip |
switching to Arm mode in do_interrupt() (Paul Brook)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1711 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm')
-rw-r--r-- | target-arm/helper.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index 9cf159c07c..538e17a35c 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -162,10 +162,11 @@ void do_interrupt(CPUARMState *env) } switch_mode (env, new_mode); env->spsr = cpsr_read(env); - /* Switch to the new mode, and clear the thumb bit. */ + /* Switch to the new mode, and switch to Arm mode. */ /* ??? Thumb interrupt handlers not implemented. */ - env->uncached_cpsr = (env->uncached_cpsr & ~(CPSR_M | CPSR_T)) | new_mode; + env->uncached_cpsr = (env->uncached_cpsr & ~CPSR_M) | new_mode; env->uncached_cpsr |= mask; + env->thumb = 0; env->regs[14] = env->regs[15] + offset; env->regs[15] = addr; env->interrupt_request |= CPU_INTERRUPT_EXITTB; |