diff options
| author | Leon Alrae | 2015-06-19 15:17:45 +0200 |
|---|---|---|
| committer | Peter Maydell | 2015-06-19 15:17:45 +0200 |
| commit | cfe67cef48696e8b901aff38a82056ae64d69c98 (patch) | |
| tree | 2b09c2099a645932fc3d41742517f67d918b065e /target-arm | |
| parent | arm: xlnx-zynqmp: Add 2xCortexR5 CPUs (diff) | |
| download | qemu-cfe67cef48696e8b901aff38a82056ae64d69c98.tar.gz qemu-cfe67cef48696e8b901aff38a82056ae64d69c98.tar.xz qemu-cfe67cef48696e8b901aff38a82056ae64d69c98.zip | |
semihosting: create SemihostingConfig structure and semihost.h
Remove semihosting_enabled and semihosting_target and replace them with
SemihostingConfig structure containing equivalent fields. The structure
is defined in vl.c where it is actually set.
Also introduce separate header file include/exec/semihost.h allowing to
access semihosting config related stuff from target specific semihosting
code.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1434643256-16858-2-git-send-email-leon.alrae@imgtec.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/helper.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index efce6cde71..aa341599cf 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -10,6 +10,7 @@ #include "exec/cpu_ldst.h" #include "arm_ldst.h" #include <zlib.h> /* For crc32 */ +#include "exec/semihost.h" #ifndef CONFIG_USER_ONLY static inline bool get_phys_addr(CPUARMState *env, target_ulong address, @@ -4554,7 +4555,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_MEM); return; case EXCP_BKPT: - if (semihosting_enabled) { + if (semihosting_enabled()) { int nr; nr = arm_lduw_code(env, env->regs[15], env->bswap_code) & 0xff; if (nr == 0xab) { @@ -4866,7 +4867,7 @@ void arm_cpu_do_interrupt(CPUState *cs) offset = 4; break; case EXCP_SWI: - if (semihosting_enabled) { + if (semihosting_enabled()) { /* Check for semihosting interrupt. */ if (env->thumb) { mask = arm_lduw_code(env, env->regs[15] - 2, env->bswap_code) @@ -4893,7 +4894,7 @@ void arm_cpu_do_interrupt(CPUState *cs) break; case EXCP_BKPT: /* See if this is a semihosting syscall. */ - if (env->thumb && semihosting_enabled) { + if (env->thumb && semihosting_enabled()) { mask = arm_lduw_code(env, env->regs[15], env->bswap_code) & 0xff; if (mask == 0xab && (env->uncached_cpsr & CPSR_M) != ARM_CPU_MODE_USR) { |