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| author | aurel32 | 2009-04-05 22:08:59 +0200 |
|---|---|---|
| committer | aurel32 | 2009-04-05 22:08:59 +0200 |
| commit | 1b530a6dfcfe4510f66cb90a1717698063ac7a4f (patch) | |
| tree | 43c8336cbbd0c165cbde16898c76e9cb078a9b60 /target-cris | |
| parent | tcg/x86_64: optimize register allocation order (diff) | |
| download | qemu-1b530a6dfcfe4510f66cb90a1717698063ac7a4f.tar.gz qemu-1b530a6dfcfe4510f66cb90a1717698063ac7a4f.tar.xz qemu-1b530a6dfcfe4510f66cb90a1717698063ac7a4f.zip | |
Add new command line option -singlestep for tcg single stepping.
This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.
Add monitor command to enable or disable single step mode.
Modify monitor command "info status" to display single step mode.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-cris')
| -rw-r--r-- | target-cris/translate.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-cris/translate.c b/target-cris/translate.c index d5fcb9e636..d9256ca423 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -3272,6 +3272,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, break; } while (!dc->is_jmp && !dc->cpustate_changed && gen_opc_ptr < gen_opc_end + && !singlestep && (dc->pc < next_page_start) && num_insns < max_insns); |