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authorAnthony Liguori2013-07-23 17:57:04 +0200
committerAnthony Liguori2013-07-23 17:57:04 +0200
commit3988982c82ad4173dea376fea30e5432d36146db (patch)
treea4f72b53b9db680859ecc16b43dae4f113e1b744 /target-i386/cpu.c
parentMerge remote-tracking branch 'afaerber/tags/qom-devices-for-anthony' into sta... (diff)
parentlinux-user: Use X86CPU property to retrieve CPUID family (diff)
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Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
QOM CPUState refactorings * Fix NULL pointer dereference in gdbstub * Introduce vaddr type * Introduce CPUClass::set_pc() * Introduce CPUClass::synchronize_from_tb() * Introduce CPUClass::get_phys_page_debug() * Introduce CPUClass::memory_rw_debug() * Move singlestep_enabled and gdb_regs fields out of CPU_COMMON * Adopt CPUState in more APIs * Propagate CPUState in gdbstub # gpg: Signature made Mon 22 Jul 2013 07:50:17 PM CDT using RSA key ID 3E7E013F # gpg: Can't check signature: public key not found # By Andreas Färber (21) and others # Via Andreas Färber * afaerber/tags/qom-cpu-for-anthony: (24 commits) linux-user: Use X86CPU property to retrieve CPUID family gdbstub: Change gdb_register_coprocessor() argument to CPUState cpu: Move gdb_regs field from CPU_COMMON to CPUState gdbstub: Change GDBState::{c,g}_cpu and find_cpu() to CPUState cpu: Introduce CPUClass::memory_rw_debug() for target_memory_rw_debug() exec: Change cpu_memory_rw_debug() argument to CPUState cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook gdbstub: Change gdb_{read,write}_register() argument to CPUState gdbstub: Change gdb_handlesig() argument to CPUState gdbstub: Change syscall callback argument to CPUState kvm: Change kvm_{insert,remove}_breakpoint() argument to CPUState cpu: Change cpu_single_step() argument to CPUState gdbstub: Update gdb_handlesig() and gdb_signalled() Coding Style cpu: Move singlestep_enabled field from CPU_COMMON to CPUState target-alpha: Copy implver to DisasContext target-alpha: Copy singlestep_enabled to DisasContext cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb() target-unicore32: Implement CPUClass::set_pc() target-moxie: Implement CPUClass::set_pc() target-m68k: Implement CPUClass::set_pc() ...
Diffstat (limited to 'target-i386/cpu.c')
-rw-r--r--target-i386/cpu.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index e3f75a81a7..cd350cb8e4 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2506,6 +2506,20 @@ static bool x86_cpu_get_paging_enabled(const CPUState *cs)
return cpu->env.cr[0] & CR0_PG_MASK;
}
+static void x86_cpu_set_pc(CPUState *cs, vaddr value)
+{
+ X86CPU *cpu = X86_CPU(cs);
+
+ cpu->env.eip = value;
+}
+
+static void x86_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+{
+ X86CPU *cpu = X86_CPU(cs);
+
+ cpu->env.eip = tb->pc - tb->cs_base;
+}
+
static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
{
X86CPUClass *xcc = X86_CPU_CLASS(oc);
@@ -2522,16 +2536,19 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
cc->do_interrupt = x86_cpu_do_interrupt;
cc->dump_state = x86_cpu_dump_state;
+ cc->set_pc = x86_cpu_set_pc;
+ cc->synchronize_from_tb = x86_cpu_synchronize_from_tb;
cc->get_arch_id = x86_cpu_get_arch_id;
cc->get_paging_enabled = x86_cpu_get_paging_enabled;
#ifndef CONFIG_USER_ONLY
cc->get_memory_mapping = x86_cpu_get_memory_mapping;
+ cc->get_phys_page_debug = x86_cpu_get_phys_page_debug;
cc->write_elf64_note = x86_cpu_write_elf64_note;
cc->write_elf64_qemunote = x86_cpu_write_elf64_qemunote;
cc->write_elf32_note = x86_cpu_write_elf32_note;
cc->write_elf32_qemunote = x86_cpu_write_elf32_qemunote;
+ cc->vmsd = &vmstate_x86_cpu;
#endif
- cpu_class_set_vmsd(cc, &vmstate_x86_cpu);
}
static const TypeInfo x86_cpu_type_info = {