diff options
| author | Marcelo Tosatti | 2010-10-11 20:31:21 +0200 |
|---|---|---|
| committer | Anthony Liguori | 2010-10-20 23:15:04 +0200 |
| commit | c0532a76b407af4b276dc5a62d8178db59857ea6 (patch) | |
| tree | 6a34d8986e474edd0ba63dd283cda22d31436dc3 /target-i386/helper.c | |
| parent | Add RAM -> physical addr mapping in MCE simulation (diff) | |
| download | qemu-c0532a76b407af4b276dc5a62d8178db59857ea6.tar.gz qemu-c0532a76b407af4b276dc5a62d8178db59857ea6.tar.xz qemu-c0532a76b407af4b276dc5a62d8178db59857ea6.zip | |
MCE: Relay UCR MCE to guest
Port qemu-kvm's
commit 4b62fff1101a7ad77553147717a8bd3bf79df7ef
Author: Huang Ying <ying.huang@intel.com>
Date: Mon Sep 21 10:43:25 2009 +0800
MCE: Relay UCR MCE to guest
UCR (uncorrected recovery) MCE is supported in recent Intel CPUs,
where some hardware error such as some memory error can be reported
without PCC (processor context corrupted). To recover from such MCE,
the corresponding memory will be unmapped, and all processes accessing
the memory will be killed via SIGBUS.
For KVM, if QEMU/KVM is killed, all guest processes will be killed
too. So we relay SIGBUS from host OS to guest system via a UCR MCE
injection. Then guest OS can isolate corresponding memory and kill
necessary guest processes only. SIGBUS sent to main thread (not VCPU
threads) will be broadcast to all VCPU threads as UCR MCE.
aliguori: fix build
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'target-i386/helper.c')
| -rw-r--r-- | target-i386/helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-i386/helper.c b/target-i386/helper.c index 4b430dd374..4fff4a871f 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -1032,7 +1032,7 @@ void cpu_inject_x86_mce(CPUState *cenv, int bank, uint64_t status, return; if (kvm_enabled()) { - kvm_inject_x86_mce(cenv, bank, status, mcg_status, addr, misc); + kvm_inject_x86_mce(cenv, bank, status, mcg_status, addr, misc, 0); return; } |