diff options
author | Jan Kiszka | 2011-09-26 19:20:00 +0200 |
---|---|---|
committer | Blue Swirl | 2011-10-01 08:21:45 +0200 |
commit | 86ce7a5e7eedb7b1f18b24159fde20d47259b619 (patch) | |
tree | 7fecd012a93c670fe607adc631b505833979582a /target-i386 | |
parent | softfloat: Reinstate accidentally disabled target-specific NaN handling (diff) | |
download | qemu-86ce7a5e7eedb7b1f18b24159fde20d47259b619.tar.gz qemu-86ce7a5e7eedb7b1f18b24159fde20d47259b619.tar.xz qemu-86ce7a5e7eedb7b1f18b24159fde20d47259b619.zip |
target-i386: Remove redundant word mask in port out instructions
T0 was already masked to 16 bits when loading it.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-i386')
-rw-r--r-- | target-i386/translate.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c index b894e97e15..1ef8d16ac7 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -6116,7 +6116,6 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (use_icount) gen_io_start(); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - tcg_gen_andi_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0xffff); tcg_gen_trunc_tl_i32(cpu_tmp3_i32, cpu_T[1]); gen_helper_out_func(ot, cpu_tmp2_i32, cpu_tmp3_i32); if (use_icount) { @@ -6159,7 +6158,6 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) if (use_icount) gen_io_start(); tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); - tcg_gen_andi_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0xffff); tcg_gen_trunc_tl_i32(cpu_tmp3_i32, cpu_T[1]); gen_helper_out_func(ot, cpu_tmp2_i32, cpu_tmp3_i32); if (use_icount) { |