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| author | Alistair Francis | 2015-05-29 08:31:20 +0200 |
|---|---|---|
| committer | Edgar E. Iglesias | 2015-06-21 09:20:15 +0200 |
| commit | f27183abaaaf48e9d1f8469c7e99a987444f4410 (patch) | |
| tree | ed7cc8ce578f35b6c9d0314ee1a331039aa08685 /target-microblaze | |
| parent | target-microblaze: Allow the stack protection to be disabled (diff) | |
| download | qemu-f27183abaaaf48e9d1f8469c7e99a987444f4410.tar.gz qemu-f27183abaaaf48e9d1f8469c7e99a987444f4410.tar.xz qemu-f27183abaaaf48e9d1f8469c7e99a987444f4410.zip | |
target-microblaze: Tidy up the base-vectors property
Rename the "xlnx.base-vectors" string to "base-vectors" and
move the base_vectors variable into the cfg struct.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target-microblaze')
| -rw-r--r-- | target-microblaze/cpu-qom.h | 3 | ||||
| -rw-r--r-- | target-microblaze/cpu.c | 4 | ||||
| -rw-r--r-- | target-microblaze/helper.c | 8 |
3 files changed, 8 insertions, 7 deletions
diff --git a/target-microblaze/cpu-qom.h b/target-microblaze/cpu-qom.h index e08adb9e02..dd04199096 100644 --- a/target-microblaze/cpu-qom.h +++ b/target-microblaze/cpu-qom.h @@ -56,12 +56,13 @@ typedef struct MicroBlazeCPUClass { typedef struct MicroBlazeCPU { /*< private >*/ CPUState parent_obj; - uint32_t base_vectors; + /*< public >*/ /* Microblaze Configuration Settings */ struct { bool stackprot; + uint32_t base_vectors; } cfg; CPUMBState env; diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index d3dad4ab7a..0f805d334f 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -120,7 +120,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */ env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17); - env->sregs[SR_PC] = cpu->base_vectors; + env->sregs[SR_PC] = cpu->cfg.base_vectors; #if defined(CONFIG_USER_ONLY) env->pvr.regs[10] = 0x0c000000; /* Spartan 3a dsp. */ @@ -158,7 +158,7 @@ static const VMStateDescription vmstate_mb_cpu = { }; static Property mb_properties[] = { - DEFINE_PROP_UINT32("xlnx.base-vectors", MicroBlazeCPU, base_vectors, 0), + DEFINE_PROP_UINT32("base-vectors", MicroBlazeCPU, cfg.base_vectors, 0), DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot, true), DEFINE_PROP_END_OF_LIST(), diff --git a/target-microblaze/helper.c b/target-microblaze/helper.c index 32896f446a..69c3252554 100644 --- a/target-microblaze/helper.c +++ b/target-microblaze/helper.c @@ -154,7 +154,7 @@ void mb_cpu_do_interrupt(CPUState *cs) env->sregs[SR_ESR], env->iflags); log_cpu_state_mask(CPU_LOG_INT, cs, 0); env->iflags &= ~(IMM_FLAG | D_FLAG); - env->sregs[SR_PC] = cpu->base_vectors + 0x20; + env->sregs[SR_PC] = cpu->cfg.base_vectors + 0x20; break; case EXCP_MMU: @@ -194,7 +194,7 @@ void mb_cpu_do_interrupt(CPUState *cs) env->sregs[SR_PC], env->sregs[SR_EAR], env->iflags); log_cpu_state_mask(CPU_LOG_INT, cs, 0); env->iflags &= ~(IMM_FLAG | D_FLAG); - env->sregs[SR_PC] = cpu->base_vectors + 0x20; + env->sregs[SR_PC] = cpu->cfg.base_vectors + 0x20; break; case EXCP_IRQ: @@ -235,7 +235,7 @@ void mb_cpu_do_interrupt(CPUState *cs) env->sregs[SR_MSR] |= t; env->regs[14] = env->sregs[SR_PC]; - env->sregs[SR_PC] = cpu->base_vectors + 0x10; + env->sregs[SR_PC] = cpu->cfg.base_vectors + 0x10; //log_cpu_state_mask(CPU_LOG_INT, cs, 0); break; @@ -254,7 +254,7 @@ void mb_cpu_do_interrupt(CPUState *cs) if (cs->exception_index == EXCP_HW_BREAK) { env->regs[16] = env->sregs[SR_PC]; env->sregs[SR_MSR] |= MSR_BIP; - env->sregs[SR_PC] = cpu->base_vectors + 0x18; + env->sregs[SR_PC] = cpu->cfg.base_vectors + 0x18; } else env->sregs[SR_PC] = env->btarget; break; |