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| author | ths | 2007-01-21 04:13:58 +0100 |
|---|---|---|
| committer | ths | 2007-01-21 04:13:58 +0100 |
| commit | 72f341ed1ef52607070120a7bbdc350edf52da47 (patch) | |
| tree | 382b542a4a3cf13e0c23efd4e1e09ab4dcf20a9d /target-mips/TODO | |
| parent | Bring TLB / PageSize handling in line with real hardware behaviour. (diff) | |
| download | qemu-72f341ed1ef52607070120a7bbdc350edf52da47.tar.gz qemu-72f341ed1ef52607070120a7bbdc350edf52da47.tar.xz qemu-72f341ed1ef52607070120a7bbdc350edf52da47.zip | |
TLB address wraparound hopefully fixed now.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2342 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/TODO')
| -rw-r--r-- | target-mips/TODO | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target-mips/TODO b/target-mips/TODO index e162ea5295..13ae2a93d0 100644 --- a/target-mips/TODO +++ b/target-mips/TODO @@ -3,7 +3,6 @@ Unsolved issues/bugs in the mips/mipsel backend General ------- -- TLB fails cornercase at address wrap around - [ls][dw][lr] report broken (aligned) BadVAddr - Missing per-CPU instruction decoding, currently all implemented instructions are regarded as valid |