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authorths2007-01-21 04:13:58 +0100
committerths2007-01-21 04:13:58 +0100
commit72f341ed1ef52607070120a7bbdc350edf52da47 (patch)
tree382b542a4a3cf13e0c23efd4e1e09ab4dcf20a9d /target-mips/TODO
parentBring TLB / PageSize handling in line with real hardware behaviour. (diff)
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TLB address wraparound hopefully fixed now.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2342 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/TODO')
-rw-r--r--target-mips/TODO1
1 files changed, 0 insertions, 1 deletions
diff --git a/target-mips/TODO b/target-mips/TODO
index e162ea5295..13ae2a93d0 100644
--- a/target-mips/TODO
+++ b/target-mips/TODO
@@ -3,7 +3,6 @@ Unsolved issues/bugs in the mips/mipsel backend
General
-------
-- TLB fails cornercase at address wrap around
- [ls][dw][lr] report broken (aligned) BadVAddr
- Missing per-CPU instruction decoding, currently all implemented
instructions are regarded as valid