diff options
| author | ths | 2008-07-09 13:05:10 +0200 |
|---|---|---|
| committer | ths | 2008-07-09 13:05:10 +0200 |
| commit | b6d96beda3a6cbf20a2d04a609eff78adebd8859 (patch) | |
| tree | b64acdf5f52beda5f8ce56127e5cc9e34140192e /target-mips/cpu.h | |
| parent | Fix typo (diff) | |
| download | qemu-b6d96beda3a6cbf20a2d04a609eff78adebd8859.tar.gz qemu-b6d96beda3a6cbf20a2d04a609eff78adebd8859.tar.xz qemu-b6d96beda3a6cbf20a2d04a609eff78adebd8859.zip | |
Use temporary registers for the MIPS FPU emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4861 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/cpu.h')
| -rw-r--r-- | target-mips/cpu.h | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index e747bc8886..3ec867a722 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -171,20 +171,14 @@ typedef struct CPUMIPSState CPUMIPSState; struct CPUMIPSState { TCState active_tc; - /* temporary hack for FP globals */ -#ifndef USE_HOST_FLOAT_REGS - fpr_t ft0; - fpr_t ft1; - fpr_t ft2; -#endif CPUMIPSMVPContext *mvp; CPUMIPSTLBContext *tlb; CPUMIPSFPUContext *fpu; uint32_t current_tc; uint32_t SEGBITS; - target_ulong SEGMask; uint32_t PABITS; + target_ulong SEGMask; target_ulong PAMask; int32_t CP0_Index; |