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| author | ths | 2006-12-06 21:17:30 +0100 |
|---|---|---|
| committer | ths | 2006-12-06 21:17:30 +0100 |
| commit | 7a387fffce508fedae82e3e81b90d1f20c02c783 (patch) | |
| tree | 1291fac9008d87729c2e129b76aa39e79e4b7436 /target-mips/exec.h | |
| parent | Dynamically translate MIPS mtc0 instructions. (diff) | |
| download | qemu-7a387fffce508fedae82e3e81b90d1f20c02c783.tar.gz qemu-7a387fffce508fedae82e3e81b90d1f20c02c783.tar.xz qemu-7a387fffce508fedae82e3e81b90d1f20c02c783.zip | |
Add MIPS32R2 instructions, and generally straighten out the instruction
decoding. This is also the first percent towards MIPS64 support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2224 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/exec.h')
| -rw-r--r-- | target-mips/exec.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-mips/exec.h b/target-mips/exec.h index e39f70f872..817ef03469 100644 --- a/target-mips/exec.h +++ b/target-mips/exec.h @@ -68,6 +68,7 @@ void do_msubu (void); #endif void do_mfc0_random(void); void do_mfc0_count(void); +void do_mtc0_entryhi(uint32_t in); void do_mtc0_status_debug(uint32_t old, uint32_t val); void do_mtc0_status_irqraise_debug(void); void do_tlbwi (void); |