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| author | ths | 2007-09-06 02:18:15 +0200 |
|---|---|---|
| committer | ths | 2007-09-06 02:18:15 +0200 |
| commit | ead9360e2fbcaae10a8ca3d8bfed885422205dca (patch) | |
| tree | bbec65c2f895319d4192f9662919f74f51556f9a /target-mips/exec.h | |
| parent | Build fix for older GCCs. (diff) | |
| download | qemu-ead9360e2fbcaae10a8ca3d8bfed885422205dca.tar.gz qemu-ead9360e2fbcaae10a8ca3d8bfed885422205dca.tar.xz qemu-ead9360e2fbcaae10a8ca3d8bfed885422205dca.zip | |
Partial support for 34K multithreading, not functional yet.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/exec.h')
| -rw-r--r-- | target-mips/exec.h | 39 |
1 files changed, 20 insertions, 19 deletions
diff --git a/target-mips/exec.h b/target-mips/exec.h index 5b0c833848..53c4189a51 100644 --- a/target-mips/exec.h +++ b/target-mips/exec.h @@ -23,24 +23,24 @@ register target_ulong T2 asm(AREG3); #if defined (USE_HOST_FLOAT_REGS) #error "implement me." #else -#define FDT0 (env->ft0.fd) -#define FDT1 (env->ft1.fd) -#define FDT2 (env->ft2.fd) -#define FST0 (env->ft0.fs[FP_ENDIAN_IDX]) -#define FST1 (env->ft1.fs[FP_ENDIAN_IDX]) -#define FST2 (env->ft2.fs[FP_ENDIAN_IDX]) -#define FSTH0 (env->ft0.fs[!FP_ENDIAN_IDX]) -#define FSTH1 (env->ft1.fs[!FP_ENDIAN_IDX]) -#define FSTH2 (env->ft2.fs[!FP_ENDIAN_IDX]) -#define DT0 (env->ft0.d) -#define DT1 (env->ft1.d) -#define DT2 (env->ft2.d) -#define WT0 (env->ft0.w[FP_ENDIAN_IDX]) -#define WT1 (env->ft1.w[FP_ENDIAN_IDX]) -#define WT2 (env->ft2.w[FP_ENDIAN_IDX]) -#define WTH0 (env->ft0.w[!FP_ENDIAN_IDX]) -#define WTH1 (env->ft1.w[!FP_ENDIAN_IDX]) -#define WTH2 (env->ft2.w[!FP_ENDIAN_IDX]) +#define FDT0 (env->fpu->ft0.fd) +#define FDT1 (env->fpu->ft1.fd) +#define FDT2 (env->fpu->ft2.fd) +#define FST0 (env->fpu->ft0.fs[FP_ENDIAN_IDX]) +#define FST1 (env->fpu->ft1.fs[FP_ENDIAN_IDX]) +#define FST2 (env->fpu->ft2.fs[FP_ENDIAN_IDX]) +#define FSTH0 (env->fpu->ft0.fs[!FP_ENDIAN_IDX]) +#define FSTH1 (env->fpu->ft1.fs[!FP_ENDIAN_IDX]) +#define FSTH2 (env->fpu->ft2.fs[!FP_ENDIAN_IDX]) +#define DT0 (env->fpu->ft0.d) +#define DT1 (env->fpu->ft1.d) +#define DT2 (env->fpu->ft2.d) +#define WT0 (env->fpu->ft0.w[FP_ENDIAN_IDX]) +#define WT1 (env->fpu->ft1.w[FP_ENDIAN_IDX]) +#define WT2 (env->fpu->ft2.w[FP_ENDIAN_IDX]) +#define WTH0 (env->fpu->ft0.w[!FP_ENDIAN_IDX]) +#define WTH1 (env->fpu->ft1.w[!FP_ENDIAN_IDX]) +#define WTH2 (env->fpu->ft2.w[!FP_ENDIAN_IDX]) #endif #if defined (DEBUG_OP) @@ -157,7 +157,8 @@ void cpu_mips_update_irq (CPUState *env); void cpu_mips_clock_init (CPUState *env); void cpu_mips_tlb_flush (CPUState *env, int flush_global); -void do_ctc1 (void); +void do_cfc1 (int reg); +void do_ctc1 (int reg); #define FOP_PROTO(op) \ void do_float_ ## op ## _s(void); \ |