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authorths2007-05-07 14:46:25 +0200
committerths2007-05-07 14:46:25 +0200
commit0a6de7500261839c9383b30207ba2ca5f7a402eb (patch)
treef7a98d0755dc639c232956cc315c2d4fceaf9678 /target-mips/helper.c
parentReport unassigned memory access to CPU (not enabled yet) (diff)
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Clear BD slot on next exception if appropriate.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2777 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/helper.c')
-rw-r--r--target-mips/helper.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/target-mips/helper.c b/target-mips/helper.c
index 71a9723396..8d9435a232 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -302,6 +302,8 @@ void do_interrupt (CPUState *env)
env->hflags |= MIPS_HFLAG_DM;
env->hflags &= ~MIPS_HFLAG_UM;
/* EJTAG probe trap enable is not implemented... */
+ if (!(env->CP0_Status & (1 << CP0St_EXL)))
+ env->CP0_Cause &= ~(1 << CP0Ca_BD);
env->PC = (int32_t)0xBFC00480;
break;
case EXCP_RESET:
@@ -324,6 +326,8 @@ void do_interrupt (CPUState *env)
}
env->CP0_Status |= (1 << CP0St_ERL) | (1 << CP0St_BEV);
env->hflags &= ~MIPS_HFLAG_UM;
+ if (!(env->CP0_Status & (1 << CP0St_EXL)))
+ env->CP0_Cause &= ~(1 << CP0Ca_BD);
env->PC = (int32_t)0xBFC00000;
break;
case EXCP_MCHECK: