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| author | Andreas Färber | 2013-09-03 13:59:37 +0200 |
|---|---|---|
| committer | Andreas Färber | 2014-03-13 19:52:47 +0100 |
| commit | 0c591eb0a9d0593d71d7cb61f4184222ac14fdd2 (patch) | |
| tree | 27fc876065b6ed65266b3615a424e6e2cafdfd30 /target-mips | |
| parent | cputlb: Change tlb_flush() argument to CPUState (diff) | |
| download | qemu-0c591eb0a9d0593d71d7cb61f4184222ac14fdd2.tar.gz qemu-0c591eb0a9d0593d71d7cb61f4184222ac14fdd2.tar.xz qemu-0c591eb0a9d0593d71d7cb61f4184222ac14fdd2.zip | |
cputlb: Change tlb_set_page() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/helper.c b/target-mips/helper.c index f3879eddda..b28ae9b033 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -300,7 +300,7 @@ int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, " prot %d\n", __func__, address, ret, physical, prot); if (ret == TLBRET_MATCH) { - tlb_set_page(env, address & TARGET_PAGE_MASK, + tlb_set_page(cs, address & TARGET_PAGE_MASK, physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, mmu_idx, TARGET_PAGE_SIZE); ret = 0; |