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author | Leon Alrae | 2015-01-26 17:49:42 +0100 |
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committer | Leon Alrae | 2015-02-13 15:11:29 +0100 |
commit | b40a1530f294b5fa4479dc3ca9bf46c269d08d87 (patch) | |
tree | f842c8f6bf2175755db820631fd3214df3c0c59f /target-mips | |
parent | target-mips: use CP0EnLo_XI instead of magic number (diff) | |
download | qemu-b40a1530f294b5fa4479dc3ca9bf46c269d08d87.tar.gz qemu-b40a1530f294b5fa4479dc3ca9bf46c269d08d87.tar.xz qemu-b40a1530f294b5fa4479dc3ca9bf46c269d08d87.zip |
target-mips: fix broken snapshotting
Recently added CP0.BadInstr and CP0.BadInstrP registers ended up in cpu_load()
under different offset than in cpu_save(). These and all registers between were
incorrectly restored.
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips')
-rw-r--r-- | target-mips/machine.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/target-mips/machine.c b/target-mips/machine.c index 0ba7d736db..6c76dfbe03 100644 --- a/target-mips/machine.c +++ b/target-mips/machine.c @@ -285,6 +285,10 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) qemu_get_sbe32s(f, &env->CP0_SRSConf4); qemu_get_sbe32s(f, &env->CP0_HWREna); qemu_get_betls(f, &env->CP0_BadVAddr); + if (version_id >= 5) { + qemu_get_be32s(f, &env->CP0_BadInstr); + qemu_get_be32s(f, &env->CP0_BadInstrP); + } qemu_get_sbe32s(f, &env->CP0_Count); qemu_get_betls(f, &env->CP0_EntryHi); qemu_get_sbe32s(f, &env->CP0_Compare); @@ -319,8 +323,6 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) qemu_get_betls(f, &env->CP0_ErrorEPC); qemu_get_sbe32s(f, &env->CP0_DESAVE); if (version_id >= 5) { - qemu_get_be32s(f, &env->CP0_BadInstr); - qemu_get_be32s(f, &env->CP0_BadInstrP); for (i = 0; i < MIPS_KSCRATCH_NUM; i++) { qemu_get_betls(f, &env->CP0_KScratch[i]); } |