diff options
| author | Peter Maydell | 2016-01-22 16:09:21 +0100 |
|---|---|---|
| committer | Peter Maydell | 2016-01-22 16:09:21 +0100 |
| commit | f4014512cda682a9d0c75310d278d7ae96b0505c (patch) | |
| tree | 3f611fe1ffa23fe69d7bc28e0783622c7b30adb4 /target-mips | |
| parent | fpu: Replace uint64 typedef with uint64_t (diff) | |
| download | qemu-f4014512cda682a9d0c75310d278d7ae96b0505c.tar.gz qemu-f4014512cda682a9d0c75310d278d7ae96b0505c.tar.xz qemu-f4014512cda682a9d0c75310d278d7ae96b0505c.zip | |
fpu: Replace int32 typedef with int32_t
Replace the int32 softfloat-specific typedef with int32_t.
This change was made with
find hw include fpu target-* -name '*.[ch]' | xargs sed -i -e 's/\bint32\b/int32_t/g'
together with manual removal of the typedef definition, and
manual undoing of some mis-hits where macro arguments were
being used for token pasting rather than as a type.
The uses in hw/ipmi/ should not have been using this type at all.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Leon Alrae <leon.alrae@imgtec.com>
Acked-by: James Hogan <james.hogan@imgtec.com>
Message-id: 1452603315-27030-4-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/msa_helper.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/target-mips/msa_helper.c b/target-mips/msa_helper.c index b42b23f750..b8e2917e5e 100644 --- a/target-mips/msa_helper.c +++ b/target-mips/msa_helper.c @@ -1604,7 +1604,7 @@ static inline int get_enabled_exceptions(const CPUMIPSState *env, int c) return c & enable; } -static inline float16 float16_from_float32(int32 a, flag ieee, +static inline float16 float16_from_float32(int32_t a, flag ieee, float_status *status) { float16 f_val; @@ -1636,7 +1636,7 @@ static inline float32 float32_from_float16(int16_t a, flag ieee, return a < 0 ? (f_val | (1 << 31)) : f_val; } -static inline float64 float64_from_float32(int32 a, float_status *status) +static inline float64 float64_from_float32(int32_t a, float_status *status) { float64 f_val; @@ -1657,7 +1657,7 @@ static inline float32 float32_from_q16(int16_t a, float_status *status) return f_val; } -static inline float64 float64_from_q32(int32 a, float_status *status) +static inline float64 float64_from_q32(int32_t a, float_status *status) { float64 f_val; @@ -1670,9 +1670,9 @@ static inline float64 float64_from_q32(int32 a, float_status *status) static inline int16_t float32_to_q16(float32 a, float_status *status) { - int32 q_val; - int32 q_min = 0xffff8000; - int32 q_max = 0x00007fff; + int32_t q_val; + int32_t q_min = 0xffff8000; + int32_t q_max = 0x00007fff; int ieee_ex; @@ -1690,7 +1690,7 @@ static inline int16_t float32_to_q16(float32 a, float_status *status) if (ieee_ex & float_flag_overflow) { float_raise(float_flag_inexact, status); - return (int32)a < 0 ? q_min : q_max; + return (int32_t)a < 0 ? q_min : q_max; } /* conversion to int */ @@ -1704,7 +1704,7 @@ static inline int16_t float32_to_q16(float32 a, float_status *status) set_float_exception_flags(ieee_ex & (~float_flag_invalid) , status); float_raise(float_flag_overflow | float_flag_inexact, status); - return (int32)a < 0 ? q_min : q_max; + return (int32_t)a < 0 ? q_min : q_max; } if (q_val < q_min) { @@ -1720,7 +1720,7 @@ static inline int16_t float32_to_q16(float32 a, float_status *status) return (int16_t)q_val; } -static inline int32 float64_to_q32(float64 a, float_status *status) +static inline int32_t float64_to_q32(float64 a, float_status *status) { int64_t q_val; int64_t q_min = 0xffffffff80000000LL; @@ -1761,15 +1761,15 @@ static inline int32 float64_to_q32(float64 a, float_status *status) if (q_val < q_min) { float_raise(float_flag_overflow | float_flag_inexact, status); - return (int32)q_min; + return (int32_t)q_min; } if (q_max < q_val) { float_raise(float_flag_overflow | float_flag_inexact, status); - return (int32)q_max; + return (int32_t)q_max; } - return (int32)q_val; + return (int32_t)q_val; } #define MSA_FLOAT_COND(DEST, OP, ARG1, ARG2, BITS, QUIET) \ |