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| author | Andreas Färber | 2012-05-03 06:43:49 +0200 |
|---|---|---|
| committer | Andreas Färber | 2012-10-31 04:11:37 +0100 |
| commit | 3993c6bddf6da21977349ba1b14b86294ef4f7ff (patch) | |
| tree | e740fcf1f22bb180556c97e172ec7f30d41d7f3a /target-openrisc | |
| parent | spapr: Pass PowerPCCPU to hypercalls (diff) | |
| download | qemu-3993c6bddf6da21977349ba1b14b86294ef4f7ff.tar.gz qemu-3993c6bddf6da21977349ba1b14b86294ef4f7ff.tar.xz qemu-3993c6bddf6da21977349ba1b14b86294ef4f7ff.zip | |
cpus: Pass CPUState to [qemu_]cpu_has_work()
For target-mips also change the return type to bool.
Make include paths for cpu-qom.h consistent for alpha and unicore32.
Signed-off-by: Andreas Färber <afaerber@suse.de>
[AF: Updated new target-openrisc function accordingly]
Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
Diffstat (limited to 'target-openrisc')
| -rw-r--r-- | target-openrisc/cpu.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index a701d364a5..d42ffb09b6 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -437,8 +437,10 @@ static inline int cpu_mmu_index(CPUOpenRISCState *env) } #define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_INT_0 -static inline bool cpu_has_work(CPUOpenRISCState *env) +static inline bool cpu_has_work(CPUState *cpu) { + CPUOpenRISCState *env = &OPENRISC_CPU(cpu)->env; + return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER); } |