diff options
author | Benjamin Herrenschmidt | 2016-07-27 08:56:29 +0200 |
---|---|---|
committer | David Gibson | 2016-09-07 04:33:47 +0200 |
commit | 1b7d17cae4c31e7cf16abd7036f5a5ca5dee8c57 (patch) | |
tree | 6e5f40b636cef7e3a8fb4bea236b16517f574a09 /target-ppc/excp_helper.c | |
parent | ppc: Don't update the NIP in floating point generated code (diff) | |
download | qemu-1b7d17cae4c31e7cf16abd7036f5a5ca5dee8c57.tar.gz qemu-1b7d17cae4c31e7cf16abd7036f5a5ca5dee8c57.tar.xz qemu-1b7d17cae4c31e7cf16abd7036f5a5ca5dee8c57.zip |
ppc: FP exceptions are always precise
We don't implement imprecise FP exceptions and using store_current
which sets SRR1 to the *previous* instruction never makes sense
for these. So let's be truthful and make them precise, which is
allowed by the architecture.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/excp_helper.c')
-rw-r--r-- | target-ppc/excp_helper.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c index 96c6fd9eb0..02d9e79e79 100644 --- a/target-ppc/excp_helper.c +++ b/target-ppc/excp_helper.c @@ -274,12 +274,13 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) env->error_code = 0; return; } + + /* FP exceptions always have NIP pointing to the faulting + * instruction, so always use store_next and claim we are + * precise in the MSR. + */ msr |= 0x00100000; - if (msr_fe0 == msr_fe1) { - goto store_next; - } - msr |= 0x00010000; - break; + goto store_next; case POWERPC_EXCP_INVAL: LOG_EXCP("Invalid instruction at " TARGET_FMT_lx "\n", env->nip); msr |= 0x00080000; |