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author | Anthony Liguori | 2013-07-27 00:53:19 +0200 |
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committer | Anthony Liguori | 2013-07-27 00:53:19 +0200 |
commit | 200a06397f5d3e982028fd78b25b420507ade021 (patch) | |
tree | fdbace65f82e15031ce99db4afdb3f592bb24032 /target-ppc/gdbstub.c | |
parent | sun4m: add display width and height to the firmware configuration (diff) | |
parent | cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XML (diff) | |
download | qemu-200a06397f5d3e982028fd78b25b420507ade021.tar.gz qemu-200a06397f5d3e982028fd78b25b420507ade021.tar.xz qemu-200a06397f5d3e982028fd78b25b420507ade021.zip |
Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
QOM CPUState refactorings
* Fix cpu_memory_rw_debug() breakage in s390x KVM
* Replace final CPUArchState in sysemu/kvm.h
* Introduce model subclasses for XtensaCPU
* Introduce CPUClass::gdb_num[_core]_regs
* Introduce CPUClass::gdb_core_xml_file
* Introduce CPUClass::gdb_{read,write}_register()
* Propagate CPUState further in gdbstub
# gpg: Signature made Fri 26 Jul 2013 05:04:28 PM CDT using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found
# By Andreas Färber (23) and others
# Via Andreas Färber
* afaerber/tags/qom-cpu-for-anthony: (25 commits)
cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XML
target-cris: Factor out CPUClass::gdb_read_register() hook for v10
cpu: Introduce CPUClass::gdb_{read,write}_register()
gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functions
target-xtensa: Move cpu_gdb_{read,write}_register()
target-lm32: Move cpu_gdb_{read,write}_register()
target-s390x: Move cpu_gdb_{read,write}_register()
target-alpha: Move cpu_gdb_{read,write}_register()
target-cris: Move cpu_gdb_{read,write}_register()
target-microblaze: Move cpu_gdb_{read,write}_register()
target-sh4: Move cpu_gdb_{read,write}_register()
target-openrisc: Move cpu_gdb_{read,write}_register()
target-mips: Move cpu_gdb_{read,write}_register()
target-m68k: Move cpu_gdb_{read,write}_register()
target-arm: Move cpu_gdb_{read,write}_register()
target-sparc: Move cpu_gdb_{read,write}_register()
target-ppc: Move cpu_gdb_{read,write}_register()
target-i386: Move cpu_gdb_{read,write}_register()
cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs
gdbstub: Drop dead code in cpu_gdb_{read,write}_register()
...
Diffstat (limited to 'target-ppc/gdbstub.c')
-rw-r--r-- | target-ppc/gdbstub.c | 131 |
1 files changed, 131 insertions, 0 deletions
diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c new file mode 100644 index 0000000000..1c910902ea --- /dev/null +++ b/target-ppc/gdbstub.c @@ -0,0 +1,131 @@ +/* + * PowerPC gdb server stub + * + * Copyright (c) 2003-2005 Fabrice Bellard + * Copyright (c) 2013 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/>. + */ +#include "config.h" +#include "qemu-common.h" +#include "exec/gdbstub.h" + +/* Old gdb always expects FP registers. Newer (xml-aware) gdb only + * expects whatever the target description contains. Due to a + * historical mishap the FP registers appear in between core integer + * regs and PC, MSR, CR, and so forth. We hack round this by giving the + * FP regs zero size when talking to a newer gdb. + */ + +int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + + if (n < 32) { + /* gprs */ + return gdb_get_regl(mem_buf, env->gpr[n]); + } else if (n < 64) { + /* fprs */ + if (gdb_has_xml) { + return 0; + } + stfq_p(mem_buf, env->fpr[n-32]); + return 8; + } else { + switch (n) { + case 64: + return gdb_get_regl(mem_buf, env->nip); + case 65: + return gdb_get_regl(mem_buf, env->msr); + case 66: + { + uint32_t cr = 0; + int i; + for (i = 0; i < 8; i++) { + cr |= env->crf[i] << (32 - ((i + 1) * 4)); + } + return gdb_get_reg32(mem_buf, cr); + } + case 67: + return gdb_get_regl(mem_buf, env->lr); + case 68: + return gdb_get_regl(mem_buf, env->ctr); + case 69: + return gdb_get_regl(mem_buf, env->xer); + case 70: + { + if (gdb_has_xml) { + return 0; + } + return gdb_get_reg32(mem_buf, env->fpscr); + } + } + } + return 0; +} + +int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + + if (n < 32) { + /* gprs */ + env->gpr[n] = ldtul_p(mem_buf); + return sizeof(target_ulong); + } else if (n < 64) { + /* fprs */ + if (gdb_has_xml) { + return 0; + } + env->fpr[n-32] = ldfq_p(mem_buf); + return 8; + } else { + switch (n) { + case 64: + env->nip = ldtul_p(mem_buf); + return sizeof(target_ulong); + case 65: + ppc_store_msr(env, ldtul_p(mem_buf)); + return sizeof(target_ulong); + case 66: + { + uint32_t cr = ldl_p(mem_buf); + int i; + for (i = 0; i < 8; i++) { + env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF; + } + return 4; + } + case 67: + env->lr = ldtul_p(mem_buf); + return sizeof(target_ulong); + case 68: + env->ctr = ldtul_p(mem_buf); + return sizeof(target_ulong); + case 69: + env->xer = ldtul_p(mem_buf); + return sizeof(target_ulong); + case 70: + /* fpscr */ + if (gdb_has_xml) { + return 0; + } + store_fpscr(env, ldtul_p(mem_buf), 0xffffffff); + return sizeof(target_ulong); + } + } + return 0; +} |