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authorPeter Maydell2014-07-08 12:38:12 +0200
committerPeter Maydell2014-07-08 12:38:12 +0200
commiteaa4980185943da6e36f6f2e052d41924705e1ea (patch)
treebbe6af7da0d5c6371828225df193449eec1b82ce /target-ppc/gdbstub.c
parentMerge remote-tracking branch 'remotes/afaerber/tags/prep-for-2.1' into staging (diff)
parentPPC: e500: Actually install u-boot.e500 (diff)
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Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' into staging
Patch queue for ppc - 2014-07-08 A few bug fixes for 2.1: - Fix e500* TLB emulation with qemu-system-ppc - Update SLOF to current upstream (good number of bugfixes) - Make POWER7 / POWER8 PVR match more agnostic (needed in 2.1 for cmdline compat) - Fix u-boot.e500 install (how did that happen?) - Fix H_CAS on LE hosts - ppc64le-linux-user fixes # gpg: Signature made Tue 08 Jul 2014 11:18:58 BST using RSA key ID 03FEDC60 # gpg: Can't check signature: public key not found * remotes/agraf/tags/signed-ppc-for-upstream: PPC: e500: Actually install u-boot.e500 target-ppc: Remove POWER7+ and POWER8E families target-ppc: Add pvr_match() callback pseries: Update SLOF firmware image to qemu-slof-20140630 PPC: Fix booke206 TLB with phys addrs > 32bit target-ppc: Fix gdbstub for ppc64le-linux-user target-ppc: Change default cpu for ppc64le-linux-user target-ppc: KVMPPC_H_CAS fix cpu-version endianess Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-ppc/gdbstub.c')
-rw-r--r--target-ppc/gdbstub.c34
1 files changed, 15 insertions, 19 deletions
diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c
index 694d303e19..14675f4565 100644
--- a/target-ppc/gdbstub.c
+++ b/target-ppc/gdbstub.c
@@ -83,16 +83,24 @@ static int ppc_gdb_register_len(int n)
}
}
-
-static void ppc_gdb_swap_register(uint8_t *mem_buf, int n, int len)
+/* We need to present the registers to gdb in the "current" memory ordering.
+ For user-only mode we get this for free; TARGET_WORDS_BIGENDIAN is set to
+ the proper ordering for the binary, and cannot be changed.
+ For system mode, TARGET_WORDS_BIGENDIAN is always set, and we must check
+ the current mode of the chip to see if we're running in little-endian. */
+static void maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len)
{
- if (len == 4) {
+#ifndef CONFIG_USER_ONLY
+ if (!msr_le) {
+ /* do nothing */
+ } else if (len == 4) {
bswap32s((uint32_t *)mem_buf);
} else if (len == 8) {
bswap64s((uint64_t *)mem_buf);
} else {
g_assert_not_reached();
}
+#endif
}
/* Old gdb always expects FP registers. Newer (xml-aware) gdb only
@@ -150,10 +158,7 @@ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
break;
}
}
- if (msr_le) {
- /* If cpu is in LE mode, convert memory contents to LE. */
- ppc_gdb_swap_register(mem_buf, n, r);
- }
+ maybe_bswap_register(env, mem_buf, r);
return r;
}
@@ -209,10 +214,7 @@ int ppc_cpu_gdb_read_register_apple(CPUState *cs, uint8_t *mem_buf, int n)
break;
}
}
- if (msr_le) {
- /* If cpu is in LE mode, convert memory contents to LE. */
- ppc_gdb_swap_register(mem_buf, n, r);
- }
+ maybe_bswap_register(env, mem_buf, r);
return r;
}
@@ -225,10 +227,7 @@ int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
if (!r) {
return r;
}
- if (msr_le) {
- /* If cpu is in LE mode, convert memory contents to LE. */
- ppc_gdb_swap_register(mem_buf, n, r);
- }
+ maybe_bswap_register(env, mem_buf, r);
if (n < 32) {
/* gprs */
env->gpr[n] = ldtul_p(mem_buf);
@@ -278,10 +277,7 @@ int ppc_cpu_gdb_write_register_apple(CPUState *cs, uint8_t *mem_buf, int n)
if (!r) {
return r;
}
- if (msr_le) {
- /* If cpu is in LE mode, convert memory contents to LE. */
- ppc_gdb_swap_register(mem_buf, n, r);
- }
+ maybe_bswap_register(env, mem_buf, r);
if (n < 32) {
/* gprs */
env->gpr[n] = ldq_p(mem_buf);